Universidade Nova de Lisboa

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Faculdade de Ciências e Tecnologia

Digital Systems Design

Code

7227

Academic unit

Faculdade de Ciências e Tecnologia

Department

Departamento de Engenharia Electrotécnica

Credits

6.0

Teacher in charge

Luís Filipe Santos Gomes

Weekly hours

5

Total hours

75

Teaching language

Português

Objectives

The course is devoted to digital system design concepts. The emphasis is decomposed on one hand into conceptual aspects, namely specification formalisms, (including state diagrams, statecharts and Petri nets), and on the other hand into implementation aspects, covering hardware description languages (VHDL), reconfigurable devices and digital systems testing.

Prerequisites

Knowledge associated with digital system introductory courses (namely Logic Systems I, Logic Systems II, Microprocessors).

Subject matter

Specification of digital systems: Graphical versus textual formalisms. State diagrams: Moore and Mealy machines; state encoding; partitioning. Digital systems synthesis: synchronous and asynchronous implementations, programmable logic devices based implementations (PALs, CPLDs, FPGAs).

Hardware description languages, VHDL.

Statecharts: characteristics, depth, orthogonality, broadcast, translation into state diagrams; implementation issues.

Petri nets: characteristics, low-level and high-level classes, non-autonomous extensions (time, events, actions), implementation issues; analysis, propriety verification, state space construction.

Modeling and test of digital systems: models, simulation. Test: combinatorial logic, observability and controllability; fault models, sequential circuit testing, scan techniques. DFT-design for testability. Functional testing. Compression techniques. LFSR – Linear feedback shift registers: test vector generation, signature generation. BIST-built-in self-test

 

Bibliography

"Introduction to Programmable Logic"; Karen Parnell and Nick Mehta; Xilinx 2004
"Hardware-level Design Languages", Luis Gomes, Anikó Costa; "The Industrial Information Technology Handbook"; Richard Zurawski (Editor-in-Chief), section VI – Real time embedded systems; chapter 84; CRC; ISBN 0849319854; 2005; pp. 84-1, 84-18
"Checking experiments in sequential machines", pp. 147-150; Asok Bhattacharyya; John Wiley & Sons, 1989
"VHDL for Designers",  Stefan Sjoholm, Lennart Lindh; Prentice Hall, 1997, ISBN 0-13-473414-9
"Statecharts: a visual formalism for complex systems", vol. 8, pp. 231-274; David Harel; Science of Computer Programming 1987
"Petri Nets and Industrial Applications: A Tutorial", Richard Zurawski and MengChu Zhou; IEEE Transactions on Industrial Electronics, Vol.41, no. 6, December 1994, pp. 567-583
"Digital Logic Circuit Analysis and Design", sec. 2.7.4 & c. 12; Victor Nelson, H. Troy Nagle, Bill Carroll, J. David Irwin; Prentice Hall 1995; ISBN 0-13-463894-8

Teaching method

Two-hour long weekly lectures allowing emphasis on two aspects: on one hand, on specification formalisms (state diagrams, statecharts, Petri nets), on the other hand, on implementation issues and technologies (namely hardware description languages –VHDL- and reconfigurable devices –FPGAs).
Three-hour long weekly laboratory classes where students practice concepts presented during theoretical lectures and design one specific digital system, from specification to implementation in a FPGA.

Evaluation method

Theoretical component: weight of 60%
Can be satisfied through 3 tests (the grade of each test has to be higher than 8) or 1 exam;
The grade has to be higher than 9,5
Lab component: weight of 40%
Design and report of a capstone project
The grade has to be higher than 9,5

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